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Synopsys Announces Industry's First DisplayPort 1.4 with DSC 1.2 Verification IP and Test Suites
Native SystemVerilog DisplayPort VIP Includes Built-In Coverage, Verification Planning and Protocol-Aware Debug
Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first Verification IP (VIP) and source code test suite for DisplayPort 1.4 with DSC 1.2 and for eDP 1.4a/b. With the increase in consumer demand for enhanced display resolution quality, Synopsys VC VIP for DisplayPort enables system-on-chip (SoC) teams to design these next-generation displays with ease of use and integration, resulting in accelerated verification closure.
"The new DisplayPort 1.4 standard takes advantage of VESA's Display Stream Compression technology to support new applications and richer display content at higher data rates, such as 8Kp60Hz High Dynamic Range (HDR) deep color," said Bill Lempesis, executive director of the Video Electronics Standards Association (VESA®). "Synopsys VIP for DisplayPort 1.4 is one of the solutions that helps facilitate early adoption of the standard for next-generation video/audio interfaces, smart devices and display designs, while also strengthening the overall ecosystem."
Synopsys VC VIP for DisplayPort 1.4 delivers advanced support for the highest display resolutions. It also features display stream compression (DSC) for visually lossless low-latency algorithms, increased resolution and color depths, and reduced power consumption. Synopsys VIP uses a Native SystemVerilog/UVM-based architecture to design next-generation display chips with optimum performance. Synopsys VIP is natively integrated with the Verdi® Protocol Analyzer debug solution and features advanced debug ports. The VIP also features error injection capabilities, built-in-protocol checks, coverage and verification plans.
"We continue to collaborate with leading standards organizations to develop the newest protocol specifications for next-generation designs," said Vikas Gautam, group director of VIP R&D and corporate applications for the Synopsys Verification Group. "With the introduction of Synopsys VIP for DisplayPort 1.4, we are providing our customers with advanced capabilities to accelerate the verification closure of their SoC designs."
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
Native SystemVerilog DisplayPort VIP Includes Built-In Coverage, Verification Planning and Protocol-Aware Debug
Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first Verification IP (VIP) and source code test suite for DisplayPort 1.4 with DSC 1.2 and for eDP 1.4a/b. With the increase in consumer demand for enhanced display resolution quality, Synopsys VC VIP for DisplayPort enables system-on-chip (SoC) teams to design these next-generation displays with ease of use and integration, resulting in accelerated verification closure.
"The new DisplayPort 1.4 standard takes advantage of VESA's Display Stream Compression technology to support new applications and richer display content at higher data rates, such as 8Kp60Hz High Dynamic Range (HDR) deep color," said Bill Lempesis, executive director of the Video Electronics Standards Association (VESA®). "Synopsys VIP for DisplayPort 1.4 is one of the solutions that helps facilitate early adoption of the standard for next-generation video/audio interfaces, smart devices and display designs, while also strengthening the overall ecosystem."
Synopsys VC VIP for DisplayPort 1.4 delivers advanced support for the highest display resolutions. It also features display stream compression (DSC) for visually lossless low-latency algorithms, increased resolution and color depths, and reduced power consumption. Synopsys VIP uses a Native SystemVerilog/UVM-based architecture to design next-generation display chips with optimum performance. Synopsys VIP is natively integrated with the Verdi® Protocol Analyzer debug solution and features advanced debug ports. The VIP also features error injection capabilities, built-in-protocol checks, coverage and verification plans.
"We continue to collaborate with leading standards organizations to develop the newest protocol specifications for next-generation designs," said Vikas Gautam, group director of VIP R&D and corporate applications for the Synopsys Verification Group. "With the introduction of Synopsys VIP for DisplayPort 1.4, we are providing our customers with advanced capabilities to accelerate the verification closure of their SoC designs."
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.